Electrically erasable and programmable read only memory (EEPROM) is a rewritable memory device that can hold its memory contents without power. EEPROMs are bit or byte addressable at the write level, which means either the bit or byte must be erased before it can be re-written. EEPROMs are typically used on circuit boards to store instructions and data. Referring to FIG. 1, a “floating gate” holds the stored bit charge in the EEPROM. Complementary metal oxide semiconductor (CMOS) based transistor technologies are generally used and have a “floating gate” to hold the stored bit charge. When no charge is on the floating gate, the transistor acts normally, and a pulse on the control gate causes current to flow. When the floating gate is charged, this charge blocks the normal control gate action of the memory cell transistor, and current does not flow during a pulse on the control gate. Charging is accomplished by grounding the source and drain terminals and placing sufficient voltage on the control gate so that the charge tunnels through the oxide to the floating gate. A reverse voltage channeled from another transistor clears the floating gate charge by causing it to dissipate into the integrated circuit substrate.
Memory devices require high reliability. Technologies used to create, for example, serial EEPROM products can have limitations in the devices ability to read proper data out of the memory array. For example, excess “cell” leakage can minimize/eliminate the ability to distinguish between the “on” cell and “off” cell currents of an asserted memory cell being read. An offset can be caused by use of a “leaker” transistor connected to bit-line. Use of self-timed read schemes may allow for bit-line discharge before a read. Use of a read charge pump may minimize supply variations of “on” cell current.
Furthermore, the degradation of “on” cell current and/or uncontrolled/incorrect reference current levels limit sense amplifier performance. There is endurance related degradation of “on” cell current. Reference voltage/current levels used may vary excessively with the process used and/or does not track “on” cell current versus voltage supply and/or temperature. Bit-line leakage current cannot be compensated for by a fixed reference current.